HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 373

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 10.3 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2)
Bit Rate
(bit/s)
110
150
200
250
300
600
1200
2400
4800
9600
19200
31250
38400
Notes: No indication: Setting not possible.
—: Setting possible, but errors may result.
1. The value set in BRR is given by the following equation:
2. The error in table 10.3 is the value obtained from the following equation, rounded to two
where
decimal places.
n
3
3
3
3
3
3
3
3
2
2
0
0
0
Error (%) =
N =
5 MHz
3
N
21
15
11
9
7
3
1
0
1
0
7
4
(32 × 2
B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0 ≤ N ≤ 255)
φ: System clock frequency
n: Baud rate generator input clock number (n = 0, 2, or 3)
Error
(%)
0.88
1.73
1.73
–2.34 3
1.73
1.73
1.73
1.73
1.73
173
1.73
0
1.73
B (rate obtained from n, N, OSC) – R(bit rate in left-hand column in table 10.3.)
(The relation between n and the clock is shown in table 10.4.)
φ
2n
× B)
n
3
3
3
3
2
2
0
0
0
0
0
– 1
8 MHz
N
35
25
19
15
12
25
12
103 0.16
51
25
12
7
φ
R (bit rate in left-hand column in table 10.3.)
0.16
Error
(%)
–1.36 3
0.16
–2.34 3
–2.34 3
0.16
0.16
0.16
0.16
0.16
0
n
3
3
3
3
3
3
2
2
0
0
10 MHz
N
43
32
23
19
15
7
3
1
0
1
0
9
7
Section 10 Serial Communication Interface
Rev. 8.00 Mar. 09, 2010 Page 351 of 658
Error
(%)
0.88
–1.36
1.73
–2.34
1.73
1.73
1.73
1.73
1.73
1.73
1.73
0
1.73
REJ09B0042-0800
× 100

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