HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 321

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 9.14 Input Capture Input Signal Input Edges Due to Input Capture Input Pin
Input Capture Input
Signal Input Edge
Generation of rising edge
Generation of falling edge
Note: When the P1
• Switching input capture input noise canceler function
Table 9.15 Input Capture Input Signal Input Edges Due to Noise Canceler Function
Input Capture Input
Signal Input Edge
Generation of rising edge
Generation of falling edge
When performing noise canceler function switching by modifying NCS in port mode register 2
(PMR2), which controls the input capture input noise canceler, TMIG should first be cleared to
0. Note that if NCS is modified without first clearing TMIG, an edge will be regarded as
having been input at the pin even though no valid edge has actually been input. Input capture
input signal input edges, and the conditions for their occurrence, are summarized in table 9.15.
signal is low.
Switching, and Conditions for Their Occurrence
Switching, and Conditions for Their Occurrence
3
pin is not set as an input capture input pin, the timer G input capture input
Conditions
When TMIG is modified from 0 to 1 while the TMIG pin is high
When NCS is modified from 0 to 1 while the TMIG pin is high, then
TMIG is modified from 0 to 1 before the signal is sampled five times by
the noise canceler
When TMIG is modified from 1 to 0 while the TMIG pin is high
When NCS is modified from 0 to 1 while the TMIG pin is low, then
TMIG is modified from 0 to 1 before the signal is sampled five times by
the noise canceler
When NCS is modified from 0 to 1 while the TMIG pin is high, then
TMIG is modified from 1 to 0 after the signal is sampled five times by
the noise canceler
Conditions
When the TMIG pin is modified from 0 to 1 while TMIG is 1, then NCS
is modified from 0 to 1 before the signal is sampled five times by the
noise canceler
When the TMIG pin is modified from 1 to 0 while TMIG is 1, then NCS
is modified from 1 to 0 before the signal is sampled five times by the
noise canceler
Rev. 8.00 Mar. 09, 2010 Page 299 of 658
REJ09B0042-0800
Section 9 Timers