HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 461
HD64F38024DV
Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets
1.US38024-BAG1.pdf
(684 pages)
2.DF36012GFYV.pdf
(1021 pages)
3.DF38102HV.pdf
(145 pages)
Specifications of HD64F38024DV
Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 461 of 684
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14.3
14.3.1
Figure 14.2 shows the timing of the operation of the power-on reset circuit. As the power-supply
voltage rises, the capacitor which is externally connected to the RES pin is gradually charged via
the on-chip pull-up resistor (typ. 100 kΩ). Since the state of the RES pin is transmitted within the
chip, the prescaler S and the entire chip are in their reset states. When the level on the RES pin
reaches the specified value, the prescaler S is released from its reset state and it starts counting.
The OVF signal is generated to release the internal reset signal after the prescaler S has counted
131,072 clock (φ) cycles. The noise cancellation circuit of approximately 100 ns is incorporated to
prevent the incorrect operation of the chip by noise on the RES pin.
To achieve stable operation of this LSI, the power supply needs to rise to its full level and settles
within the specified time. The maximum time required for the power supply to rise and settle after
power has been supplied (t
which is connected to RES pin (C
supply voltage, the power supply circuit should be designed to satisfy the following formula.
Note that the power supply voltage (Vcc) must fall below Vpor = 100 mV and rise after charge on
the RES pin is removed. To remove charge on the RES pin, it is recommended that the diode
should be placed near Vcc. If the power supply voltage (Vcc) rises from the point above Vpor, a
power-on reset may not occur.
Power-On Reset Circuit
t
PWON
Operation
Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38124 Group Only)
(t
PWON
(ms) ≤ 80 × C
≤ 3000 ms, C
PWON
RES
) is determined by the oscillation frequency (f
(μF) ± 10/f
RES
RES
). If t
≥ 0.22 μF, and f
PWON
OSC
(MHz)
means the time required to reach 90 % of power
OSC
= 10 in 2-MHz to 10-MHz operation)
Rev. 8.00 Mar. 09, 2010 Page 439 of 658
OSC
REJ09B0042-0800
) and capacitance
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