HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 292

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Timers
Timer Control/Status Register F (TCSRF)
TCSRF is an 8-bit read/write register that performs counter clear selection, overflow flag setting,
and compare match flag setting, and controls enabling of overflow interrupt requests.
TCSRF is initialized to H'00 upon reset.
Bit 7—Timer Overflow Flag H (OVFH)
Bit 7 is a status flag indicating that TCFH has overflowed from H'FF to H'00. This flag is set by
hardware and cleared by software. It cannot be set by software.
Bit 7
OVFH
0
1
Bit 6—Compare Match Flag H (CMFH)
Bit 6 is a status flag indicating that TCFH has matched OCRFH. This flag is set by hardware and
cleared by software. It cannot be set by software.
Bit 6
CMFH
0
1
Rev. 8.00 Mar. 09, 2010 Page 270 of 658
REJ09B0042-0800
Bit:
Initial value:
Read/Write:
Note: * Bits 7, 6, 3, and 2 can only be written with 0, for flag clearing.
Description
Clearing condition:
After reading OVFH = 1, cleared by writing 0 to OVFH
Setting condition:
Set when TCFH overflows from H’FF to H’00
Description
Clearing condition:
After reading CMFH = 1, cleared by writing 0 to CMFH
Setting condition:
Set when the TCFH value matches the OCRFH value
R/(W) *
OVFH
7
0
R/(W) *
CMFH
6
0
OVIEH
R/W
5
0
CCLRH
R/W
4
0
R/(W) *
OVFL
3
0
R/(W) *
CMFL
2
0
OVIEL
R/W
1
0
(initial value)
(initial value)
CCLRL
R/W
0
0