HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 183

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 6—Software Write Enable (SWE)
This bit is to set enabling/disabling of programming/enabling of flash memory (set when bits 5 to
0 and the EBR register are to be set).
Bit 6
SWE
0
1
Bit 5—Erase Setup (ESU)
This bit is to prepare for changing to erase mode. Set this bit to 1 before setting the E bit to 1 in
FLMCR1 (do not set SWE, PSU, EV, PV, E, and P bits at the same time).
Bit 5
ESU
0
1
Bit 4—Program Setup (PSU)
This bit is to prepare for changing to program mode. Set this bit to 1 before setting the P bit to 1
in FLMCR1 (do not set SWE, ESU, EV, PV, E, and P bits at the same time).
Bit 4
PSU
0
1
Bit 3—Erase-Verify (EV)
This bit is to set changing to or cancelling erase-verify mode (do not set SWE, ESU, PSU, PV, E,
and P bits at the same time).
Description
Programming/erasing is disabled. Other FLMCR1 register bits and all EBR bits
cannot be set.
Flash memory programming/erasing is enabled.
Description
The erase setup state is cancelled
The flash memory changes to the erase setup state. Set this bit to 1 before setting
the E bit to 1 in FLMCR1.
Description
The program setup state is cancelled
The flash memory changes to the program setup state. Set this bit to 1 before
setting the P bit to 1 in FLMCR1.
Rev. 8.00 Mar. 09, 2010 Page 161 of 658
REJ09B0042-0800
Section 6 ROM
(initial value)
(initial value)
(initial value)

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