HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 187

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 7—Power-down Disable (PDWND)
This bit selects the power-down mode of the flash memory when a transition to the subactive
mode is made.
Bit 7
PDWND
0
1
Bits 6 to 0—Reserved
These bits are always read as 0 and cannot be modified.
6.6.5
FENR controls CPU access to the flash memory control registers, FLMCR1, FLMCR2, EBR, and
FLPWCR.
Bit 7—Flash Memory Control Register Enable (FLSHE)
This bit controls access to the flash memory control registers.
Bit 7
FLSHE
0
1
Bits 6 to 0—Reserved
These bits are always read as 0 and cannot be modified.
Bit
Initial value
Read/Write
Flash Memory Enable Register (FENR)
Description
When this bit is 0 and a transition is made to the subactive mode, the flash memory
enters the power-down mode.
When this bit is 1, the flash memory remains in the normal mode even after a
transition is made to the subactive mode.
Description
Flash memory control registers cannot be accessed
Flash memory control registers can be accessed
FLSHE
R/W
7
0
6
0
5
0
4
0
Rev. 8.00 Mar. 09, 2010 Page 165 of 658
3
0
2
0
REJ09B0042-0800
Section 6 ROM
1
0
(initial value)
(initial value)
0
0

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