HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 293

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 5—Timer Overflow Interrupt Enable H (OVIEH)
Bit 5 selects enabling or disabling of interrupt generation when TCFH overflows.
Bit 5
OVIEH
0
1
Bit 4—Counter Clear H (CCLRH)
In 16-bit mode, bit 4 selects whether TCF is cleared when TCF and OCRF match.
In 8-bit mode, bit 4 selects whether TCFH is cleared when TCFH and OCRFH match.
Bit 4
CCLRH
0
1
Bit 3—Timer Overflow Flag L (OVFL)
Bit 3 is a status flag indicating that TCFL has overflowed from H'FF to H'00. This flag is set by
hardware and cleared by software. It cannot be set by software.
Bit 3
OVFL
0
1
Description
TCFH overflow interrupt request is disabled
TCFH overflow interrupt request is enabled
Description
16-bit mode: TCF clearing by compare match is disabled
8-bit mode: TCFH clearing by compare match is disabled
16-bit mode: TCF clearing by compare match is enabled
8-bit mode: TCFH clearing by compare match is enabled
Description
Clearing condition:
After reading OVFL = 1, cleared by writing 0 to OVFL
Setting condition:
Set when TCFL overflows from H’FF to H’00
Rev. 8.00 Mar. 09, 2010 Page 271 of 658
REJ09B0042-0800
Section 9 Timers
(initial value)
(initial value)
(initial value)