HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 411

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bits 7 to 2—Reserved/Bits 7 to 3—Reserved*
Bits 7 to 2 are reserved; they are always read as 1, and cannot be modified.
Note: * Implemented on H8/38124 Group only.
Bit 2—Output Format Select (PWCRm2)*
This bit selects the format of the output from the PWMm output pin.
This bit is write-only. Reading it always returns 1.
Bit 2
PWCRm2
0
1
Note: * Implemented on H8/38124 Group only.
Bits 1 and 0—Clock Select 1 and 0 (PWCRm1, PWCRm0)
Bits 1 and 0 select the clock supplied to the 10-bit PWM. These bits are write-only bits; they are
always read as 1.
Bit 1
PWCRm1
0
0
1
1
Note: * Period of PWM input clock.
Bit 0
PWCRm0 Description
0
1
0
1
Description
Pulse-division PWM
Event counter PWM
The input clock is φ (tφ * = 1/φ)
The conversion period is 512/φ, with a minimum modulation
width of 1/2φ
The input clock is φ/2 (tφ * = 2/φ)
The conversion period is 1,024/φ, with a minimum
modulation width of 1/φ
The input clock is φ/4 (tφ * = 4/φ)
The conversion period is 2,048/φ, with a minimum
modulation width of 2/φ
The input clock is φ/8 (tφ * = 8/φ)
The conversion period is 4,096/φ, with a minimum
modulation width of 4/φ
Rev. 8.00 Mar. 09, 2010 Page 389 of 658
Section 11 10-Bit PWM
REJ09B0042-0800
(initial value)
(initial value)