HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 425

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.3.3
A/D converter operation modes are shown in table 12.3.
Table 12.3 A/D Converter Operation Modes
Operation
Mode
AMR
ADSR
ADRRH
ADRRL
Note: * Undefined in a power-on reset.
12.4
When A/D conversion ends (ADSF changes from 1 to 0), bit IRRAD in interrupt request register 2
(IRR2) is set to 1.
A/D conversion end interrupts can be enabled or disabled by means of bit IENAD in interrupt
enable register 2 (IENR2).
For further details see section 3.3, Interrupts.
12.5
An example of how the A/D converter can be used is given below, using channel 1 (pin AN1) as
the analog input channel. Figure 12.3 shows the operation timing.
1. Bits CH3 to CH0 of the A/D mode register (AMR) are set to 0101, making pin AN
2. When A/D conversion is complete, bit IRRAD is set to 1, and the A/D conversion result is
3. Bit IENAD = 1, so an A/D conversion end interrupt is requested.
4. The A/D interrupt handling routine starts.
5. The A/D conversion result is read and processed.
6. The A/D interrupt handling routine ends.
input channel. A/D interrupts are enabled by setting bit IENAD to 1, and A/D conversion is
started by setting bit ADSF to 1.
stored in ADRRH and ADRRL. At the same time ADSF is cleared to 0, and the A/D converter
goes to the idle state.
A/D Converter Operation Modes
Interrupts
Typical Use
Reset
Reset
Reset
Retained * Functions Functions Retained Retained Retained Retained Retained
Retained * Functions Functions Retained Retained Retained Retained Retained
Active
Functions Functions Retained Retained Retained Retained Retained
Functions Functions Retained Retained Retained Retained Retained
Sleep
Watch
Rev. 8.00 Mar. 09, 2010 Page 403 of 658
Sub-
active
Sub-
sleep
Section 12 A/D Converter
REJ09B0042-0800
Standby
1
the analog
Module
Standby