HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 29

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

1.2
Figure 1.1(1) shows a block diagram of the H8/38024 Group and H8/38024S Group.
Figure 1.1(2) shows a block diagram of the H8/38124 Group.
Figure 1.1(1) Block Diagram (H8/38024 Group, H8/38024R Group, and H8/38024S Group)
P1
Internal Block Diagram
P5
P5
P5
P5
P5
P5
P5
P5
Note: If the on-chip emulator is used, pins 95,
P1
4
/IRQ
0
1
2
3
4
5
6
7
/WKP
/WKP
/WKP
/WKP
/WKP
/WKP
/WKP
/WKP
7
P3
P3
/IRQ
P4
P4
P6
P6
P6
P6
P6
P6
P6
P4
P3
P3
P6
P1
4
2
33, 34, and 35 are reserved for the
emulator and not available to the user.
1
P4
/TMOFH
/ADTRG
/TMOFL
1
1
2
3
4
5
6
7
0
2
P3
6
3
7
/RXD
0
1
2
3
4
5
6
7
0
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SCK
3
/AEVH
/TXD
/AEVL
3
/TMIG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/TMIF
OSC
OSC
/IRQ
0
/UD
P1
P3
P3
P3
x
x
32
32
32
10
11
12
13
14
15
16
1
2
1
2
6
3
4
5
0
1
2
3
4
5
6
7
8
9
AV
CC
(8 Kbytes to 32 Kbytes)
(512 bytes to 1 Kbyte)
System clock
Sub clock
OSC
OSC
Timer A
Timer C
Timer G
(10 bits)
ROM
RAM
A/D
Large-current (25 mA/pin) high-voltage open-drain pin (7 V)
Large-current (10 mA/pin) (H8/38024S Group only)
Large-current (10 mA/pin) high-voltage open-drain pin (7 V)
Large-current (10 mA/pin) (H8/38024S Group only)
High-voltage (7 V) input pin (Except for H8/38024S Group)
communication
Asynchronous
10-bit PWM1
10-bit PWM2
controller
Timer F
interface
(16 bits)
counter
(SCI3)
Serial
WDT
LCD
H8/300L
Rev. 8.00 Mar. 09, 2010 Page 7 of 658
CPU
IRQAEC
PA
PA
PA
PA
P9
P9
P9
P9
P9
P9
P8
P8
P8
P8
P8
P8
P8
P8
P7
P7
P7
P7
P7
P7
P7
P7
V
V
V
PB
PB
PB
PB
PB
PB
PB
PB
V
V
V
RES
TEST
1
2
3
SS
SS
CC
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Section 1 Overview
3
2
1
0
7
6
5
4
3
2
1
0
/PWM
/PWM
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/SEG
/COM
/COM
/COM
/COM
/AN
/AN
/AN
/AN
/AN
/AN
/AN
/AN
= AV
REJ09B0042-0800
7
6
5
4
3
2
1
0
/IRQ
SS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
4
3
2
1
2
1
1
/TMIC