tdat04622 ETC-unknow, tdat04622 Datasheet - Page 102

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

TDAT042G5 SONET/SDH
155/622/2488 Mbits/s Data Interface
Functional Description
Data Engine (DE) Block
Receive Data Engine (continued)
HDLC Framer. The packet processor frame aligns to HDLC packets using the HDLC flag character (0x7E). Flags
are also used to fill interpacket spaces. The flags are removed and control escape destuffing is performed. The
control escape character (0x7D) is searched for and when it is found, the control escape character is removed, i.e.,
0x7D5D is unescaped to 0x7D and 0x7D5E is unescaped to 0x7E. If dry mode is enabled, then 0x7D20 is unes-
caped to a value of 0x00, which represents dry data (FIFO underflow in the middle of a packet). Any other unes-
caped sequence of 0x7D results in an errored packet.
CRC Check. An optional CRC-ITU or CRC-32 calculation on the whole POS frame is performed after byte destuff-
ing and data descrambling. The CRC-ITU generating polynomial is 1 + x
polynomial is 1 + x + x
the whole packet, including the FCS field, should result in all zeros. A different value indicates an error. Packets
with FCS errors are marked as such and are discarded. CRC field stripping is optional. Both normal and reversed
CRC modes are supported.
Post-descrambler. The descrambler block descrambles the payload using a self-synchronous descrambler with a
generator polynomial of 1 + x
(including header and trailer) is descrambled. The descrambler may be disabled through the use of a software reg-
ister.
74
2
+ x
4
+ x
43
(continued)
. For ATM cell traffic, this block is bypassed. For HDLC frames, the entire frame
5
(continued)
+ x
7
+ x
8
+ x
10
+ x
11
+ x
12
+ x
16
+ x
22
+ x
5
+ x
23
12
+ x
+ x
26
16
+ x
. The CRC-32 generating
32
. The computation over
Agere Systems Inc.
Data Sheet
May 2001