tdat04622 ETC-unknow, tdat04622 Datasheet - Page 87

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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Data Sheet
May 2001
Agere Systems Inc.
Functional Description
Overhead Processor (OHP) Block
Receive OHP (continued)
The OH interface consists of clock, data, and frame. The data and frame signals update on the falling edge of the
clock. The frame pulse is high for the most significant bit (MSB) of the first bit of the frame. Bytes J0, Z0, and F1
(current and previous), K1, K2, and S1 can also be extracted via software registers.
Table 18 shows the ordering of the bytes for the allowed TOAC configurations.
Table 18. TOAC Channel I/O vs. STS Number/Time Slot
The overhead extract block also performs the following functions:
I
I
I
I
STS-48/STM-16
Error Monitors. The REI_L block counts remote error indication block errors. The M1 byte is extracted and
counted. This represents the number of LBIP errors detected by the far-end equipment. Optionally, a maximum
of only one REI-L error per frame may be counted (provisionable via M1BITBLKCNT[A—D]; register description,
page 175). This causes the block error counter to only increment by one when one or more errors are detected.
Automatic Protection Switch Signaling. The APS block filters the K1 and K2 bytes (automatic protection
switching channel) and stores the validated message in software-accessible registers. The K bytes are validated
after a programmable number of consecutive frames contain identical K1 (and K2[7:3] or K2[7:0]) values. APS
protection switching byte failure is detected within this block when a programmable number of frames have
passed without valid K bytes. The protection switching byte failure is removed upon detection of a programmable
number of frames with identical K1 (and K2[7:3] or K2[7:0]) bytes. The use of K2[7:3] or K2[7:0] is provisionable
via the K1K2_2_OR_1 register bit (see register description, page 169).
Line Remote Defect Indicator. Bits 2, 1, and 0 of the K2 byte are monitored for the pattern 110. If this pattern
appears for 3—15 (provisionable by OHP register CNTDK2) consecutive frames, RDI-L is asserted. RDI-L is
removed when any pattern other than 110 is detected for 3—15 (provisionable by OHP register CNTDK2) con-
secutive frames. (See page 171 for register description of CNTDK2[A—D][3:0].)
Line Alarm Indication Signal. Bits 6, 7, and 8 of the K2 byte are monitored for the pattern 111. If this pattern
appears for 3—15 (provisionable by OHP register CNTDK2) consecutive frames, AIS-L is asserted. AIS-L is
removed when any pattern other than 111 is detected for 3—15 (provisionable by OHP register CNTDK2) con-
secutive frames. (See page 171 for register description of CNTDK2[A—D][3:0].)
STS-12/STM-4
STS-3/STM-1
Output Rate
39 27 15
42 30 18
45 33 21
48 36 24 12
TOAC Channel Input vs. Input STS Number/Time Slot
(continued)
12 9 6 3 11 8 5 2 10 7 4 1 (Channel A)
12 9 6 3 11 8 5 2 10 7 4 1 (Channel B)
12 9 6 3 11 8 5 2 10 7 4 1 (Channel C)
12 9 6 3 11 8 5 2 10 7 4 1 (Channel D)
3
6
9
38 26 14
41 29 17
44 32 20
47 35 23 11 46 34 22 10 (Channel D)
(continued)
3 2 1 (Channel C)
3 2 1 (Channel D)
3 2 1 (Channel A)
3 2 1 (Channel B)
2
5
8
37 25 13
40 28 16
43 31 19
Time
155/622/2488 Mbits/s Data Interface
1
4
7
(Channel A)
(Channel B)
(Channel C)
TDAT042G5 SONET/SDH
59

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