tdat04622 ETC-unknow, tdat04622 Datasheet - Page 11

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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Part Number:
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May 2001
Agere Systems Inc.
Data Engine (DE)
DE5. Packet Behavior in POS/SDL Mode—Dry Mode
When the device is configured in POS mode with dry mode enabled, the following conditions may persist:
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Workaround
Several workarounds are possible:
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Table 3. Required UTOPIA Clock (TxCLK) Rates
Corrective Action
This condition will be corrected in version 1A of the device.
STS-48/STM-16
— Do not allow the FIFO to be emptied.
— Run the UTOPIA clock fast enough, as shown in Table 3, so that the FIFO is never empty.
— Use a larger external FIFO to buffer the data.
— Do not allow the packet size to exceed the low watermark.
PPP mode; STS-48/STS-12/STS-3.
When running in PPP mode, the PPP header—0xFF03 0x0021 (provisionable)—may be incorrectly inserted at
any point in a packet within the outgoing data stream when the FIFO runs dry, thereby corrupting the packet.
Packets being sent are corrupted if the FIFO runs dry.
PPP and CRC modes; STS-48/STS-12/STS-3.
CRC, PPP , and HDLC modes; STS-48/STS-12/STS-3.
In PPP, CRC, and HDLC dry modes, some of the packet data may be corrupted when the packet length is above
a certain size where size is dependent upon UT clock rate and low watermark setting. Either sections of the
packet may be lost or additional packets may be inserted.
Do not provision dry mode for this device.
If dry mode is provisioned:
STS-12/STM-4
STS-3/STM-1
Mode
TxCLK > 77 MHz (U3+, 32-bit mode)
(continued)
TxCLK and Rate
TxCLK > 40 MHz
TxCLK > 10 MHz
for Version 1 and 1A of the Device
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