tdat04622 ETC-unknow, tdat04622 Datasheet - Page 229

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
Register Descriptions
PT Registers
Table 103. Registers 0x0AA6—0x0AAD, 0x0AAE, 0x0AB5, 0x0AB6—0x0ABD, 0x0ABE—0x0AC5: PT Con-
Reset default of registers 0x0AA6, 0x0AAE, 0x0AB6, 0x0ABE = 0xF200.
Reset default of registers 0x0AA7, 0x0AAF, 0x0AB7, 0x0ABF = 0x0000.
Reset default of registers 0x0AA8, 0x0AB0, 0x0AB8, 0x0AC0 = 0x0FFF.
Reset default of registers 0x0AA9, 0x0AB1, 0x0AB9, 0x0AC1 = 0x0000.
Reset default of registers 0x0AAA, 0x0AB2, 0x0ABA, 0x0AC2 = 0x0000.
Reset default of registers 0x0AAB, 0x0AB3, 0x0ABB, 0x0AC3 = 0x1AAA.
Reset default of registers 0x0AAC, 0x0AB4, 0x0ABC, 0x0AC4 = 0x3AAA.
Reset default of registers 0x0AAD, 0x0AB5, 0x0ABD, 0x0AC5 = 0x3333.
* These bits maintain the validated J1 byte, place 0x0000 into all other POH bytes, and invalidate the received payload so that no data is passed
0AAA, 0AB2,
0AA8, 0AB0,
0AA9, 0AB1,
0ABA, 0AC2
0AB8, 0AC0
0AB9, 0AC1
through the DE. These bits do not affect the transmit path and do not affect the transmitted G1 byte.
Address
(Hex)
trol Parameters (R/W) (continued)
15—12
15—12
15—12
11—0
11—0
(continued)
Bit #
11
10
9
8
TRDIP_PLMPINH[A—D]
MASK_CONCAT[A—D]
RFORCE_LOP[A—D]
RFORCE_LOP[A—D]
RFORCE_AIS[A—D]
TRDIP_LCD[A—D]
TRDIPSINS[A—D]
Tx_REIP_VALUE
(continued)
[A—D][3:0]
[1—12]
[9—12]
[1—12]
Name
[5—8]
—
Receive FORCE_LOP. Control bits, when set
to a logic 1, force the associated time slot into
the LOP state; otherwise, does nothing.*
MASK_CONCATENATION Expected
Indication. When set, mask bits inhibit the
generation of AIS when the selected time slot
transitions to a state other than
CONCAT_EXPECTED[A—D].
Receive FORCE_LOP. Control bits, when set
to a logic 1, force the associated time slot into
the LOP state; otherwise, does nothing.*
Receive FORCE AIS. If set, control bits insert
AIS-P into the selected STS-1 time slot.*
Transmit REI-P Error Value. REI software
error value. Error values are 1 to 8; all others
are interpreted as no errors.
Transmit RDI-P Software Insert. Control bit,
when set, forces the value in
TRDIPDINS[A—D][2:0] into the outgoing
G1[3:1] bits.
Reserved. This bit must be written to its reset
default value (0).
Transmit RDI-P LCD. Control bit, when clear,
generates an LCD failure that causes an RDI-P
generation. When set, no LCD failure is
generated. LCD determination must be done
via software.
Transmit RDI-P PLM-P Inhibit. Control bit,
when set, causes the PLM-P failure to not
contribute to RDI-P generation.
155/622/2488 Mbits/s Data Interface
Function
TDAT042G5 SONET/SDH
Default
0xFFF
Reset
0x000
0x0
0x0
0x0
0
0
0
0
201