tdat04622 ETC-unknow, tdat04622 Datasheet - Page 305

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
DS98-193SONT-4 Replaces DS98-193SONT-3 to Incorporate the Following Updates
1. Globally numbered all the transmit sequencer time slots the same, from 1 to 12. Affects Figures 13, 14,
2. Bad PPP header counter changed to mismatched PPP header counter globally.
3. Changed bit TRDIP_LCDINH[A—D] to TRDIP_LCD[A—D] thorughout document.
4. Page 1, the number of the IETF RFC standard was corrected from 1619 to 2615; the title is still the same.
5. Page 11, moved Description section from page 1 for readability.
6. Page 24, added the note about the TDAT042G5’s internal circuitry under Table 3.
7. Page 25, Table 3, Pin Descriptions—Line Interface Signals, TxFSYNCP and TxFSYNCN pins. Corrected the
8. Page 27, Table 4, Pin Descriptions—TOH Interface Signals, clarified RxREF pin.
9. Pages 32, 38, and 164, TxSIZE_[D:A] and RxSIZE_[D:A] bits (address 0x0226), corrected bit and pin names in
10.Page 33, Table 5, Pin AM18, AM30, AA35, and H32, under the Name/Description column, second paragraph,
11.Page 33—page 39, Table 5, Pin Descriptions—Enhanced UTOPIA Interface Signals, added “These pins are
12.Page 38, Table 5, Pin Descriptions—Enhanced UTOPIA Interface Signals, corrected “must be placed” to “will be
13.Page 39, Table 5, Pin Descriptions—Enhanced UTOPIA Interface Signals, clarified RxERR pin.
14.Page 40, Table 6, Pin Descriptions—Microprocessor Interface Signals, clarified PMRST pin.
15.Page 42, Table 8, Pin Descriptions—JTAG Interface Signals, corrected TMS pin to be active-high.
16.Page 42, Table 8, Pin Descriptions—JTAG Interface Signals, expanded TRST description.
17.Page 45, Overview, corrected and expanded second paragraph.
18.Page 46, Overview, deleted any reference to cell-based UNI since not supported by this device.
19.Page 49, Overview, Over-Fiber Mode section, corrected transparent mode to over-fiber mode in this section.
20.Page 52, Transmit Line Interface Summary section, updated TxFSYNCP/N bullet item.
21.Page 53, SONET Framer, added section.
22.Page 55 (in revision 3 of data sheet), Table 16, Values of SFNSSET[A—D][18:0], SFMSET[A—D][7:0],
23.Pages 57—58, pages 187—188, and pages 208—209; Table 16, Table 17, Table 86, Table 87, Table 107, and
24.Pages 63, 200, and 205, SS pointer interpretation algorithm not implemented. Affects bit 5 of registers 0x0AA6,
25.Page 65—Page 68, SPE Generate section, corrected and expanded.
26.Page 70, Data Engine (DE) Block section, expanded second paragraph.
and 16, DE egress configuration registers Tx_TS (0x1016—0x1021), and DE ingress configuration registers
Rx_TS (0x1022—0x102D).
inadvertent switch of I
sentence.
the register description and pin descriptions.
changed the wording to include the TxERR[A] and the TxERR[B] input pins.
used only in U2+ and U3+ (packet) modes“ to size, end-of-packet, and error receive pins and transmit pins.
placed” in the paragraph beginning with, “In U3+ (32-bit mode). . .”
SFLSET[A—D][3:0], SFBSET[A—D][15:0] in Terms of Equivalent BER for BIP-24 Case, removed table.
Table 108; Ns, L, M, and B Values to Set the BER Indicator, Ns, L, M, and B Values to Clear the BER Indicator,
updated tables and added them to the PT Registers section, also.
0x0AAE, 0x0AB6, 0x0ABE; corrected from RSSPTRNORM[A—D] to Reserved in Register Maps and Register
Descriptions sections. Also affects bits 1—0 of register 0x0AC7; corrected from RSSEXP[1:0] to Reserved in
Register Maps and Register Descriptions sections. Removed item 4 from the normal pointer description on
page 63.
u
and I
d
in the I/O column, provided values for all I
155/622/2488 Mbits/s Data Interface
u
and I
d
, corrected cycle width in last
TDAT042G5 SONET/SDH
277