tdat04622 ETC-unknow, tdat04622 Datasheet - Page 104

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

TDAT042G5 SONET/SDH
155/622/2488 Mbits/s Data Interface
Functional Description
Data Engine (DE) Block
Receive Data Engine (continued)
The bad packet counting is based upon the following criteria:
I
I
Each PPP packet not counted as a bad packet in PM_MHC_n (n = 0, 1, 2, 3) counter or PM_BPC_n counter incre-
ments the PPP good packet counter, PM_GPC_n (n = 0, 1, 2, 3), for channel n. (See register descriptions,
page 241.)
Note that each channel only has a single pair of good and bad packet counters.
Transmit Data Engine
ATM Cell Inserter. The ATM cell inserter provides X
over SONET. X
required. The state diagram for the X
ate idle cells/bytes to fill the SONET/SDH payload when cells/packets are not available in the transmit direction
FIFO of the UTOPIA block. For ATM cells, the GFC, PTI, and CLP fields of the idle cell header and the idle cell pay-
load are provisionable via software registers. The idle generator generates idle cells/bytes to fill the SONET/SDH
payload when cells/packets are not available in the transmit FIFO. Idle cell HCS is automatically calculated and
inserted.
Header Check Sequence (HCS) Generator. The HCS generator performs a CRC-8 calculation over the first four
header octets of the ATM cell. The generator inserts the result into the fifth octet of the ATM header.
SDL Frame Inserter. The SDL inserter performs SDL frame generation and X
An optional CRC-16/32 field can be attached (SDL-CRC mode) and is calculated over the payload. The SDL
inserter also periodically transmits scrambler state updates through a special 6-byte message. The time between
scrambler state updates can be provisioned by software using register SDLFI_INT (see register description, page
250). The packet length header of scrambler state updates is the 16-bit word, 0x0001. Special A and B messages
can be software-provisioned to send link layer 1 messages to downstream hardware. The packet length headers
for the special A and B messages are 0x0002 and 0x0003, respectively.
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Header Fields. The PPP mismatched header counter, PM_MHC_[0—3][27:0] (addresses 0x1118—0x111F),
counts for PPP packets with various header errors/mismatches as provisioned in the registers.
CRC Field. The CRC bad packet counter, PM_BPC_n (n = 0, 1, 2, 3), increments if a CRC error is found in
channel n.
31
scrambling is suitable for the transport of ATM cells over fiber where bit-level cell delineation is
(continued)
(continued)
31
scrambler is shown in Figure 14, page72. The ATM cell inserter will gener-
43
or X
31
scrambling of the payload for transport of ATM cells
48
scrambling of the payload field.
Agere Systems Inc.
Data Sheet
May 2001