tdat04622 ETC-unknow, tdat04622 Datasheet - Page 241

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
Register Descriptions
DE Registers
Table 112. Register 0x1001, 0x1002: DE Interrupts (0x1001 is RO, 0x1002 is RO and COR/W) (continued)
Reset default of registers = 0x0000.
Note: Register 0x1002 must be used only in the COR mode, where core register 0x0010, bit 6 = 1.
Table 113. Register 0x1004: Dry Escape Marker (R/W)
Reset default of register = 0x0020.
Address
Address
(Hex)
(Hex)
1002
1004
15—8
Bit #
7—0
(continued)
Bit #
7—4
3—0
DRYESCAPE[7:0]
DEINT_ATMRxS
DEINT_ATMRxF
(continued)
Name
Name
—
Reserved. These bits must be written to their
reset default value (0x00).
Dry Escape Value. This 8-bit value, attached
with 0x7D, sets the dry marker value. The default
dry marker value would then be 0x7D20.
ATM Rx Frame State Interrupt. This interrupt is
generated when the ATM frame state is
transitioned from sync to hunt. This bit may clear
when read or written.
The following interrupts will generate a DE
interrupt:
Bit 0 corresponds to channel 0 interrupt.
Bit 1 corresponds to channel 1 interrupt.
Bit 2 corresponds to channel 2 interrupt.
Bit 3 corresponds to channel 3 interrupt.
ATM Rx X
interrupt is generated when the ATM scrambler
state is transitioned from synchronization to
verification. This bit may clear when read or
written.
The following interrupts will generate a DE
interrupt:
Bit 4 corresponds to channel 0 interrupt.
Bit 5 corresponds to channel 1 interrupt.
Bit 6 corresponds to channel 2 interrupt.
Bit 7 corresponds to channel 3 interrupt.
31
Scrambler State Interrupt. This
Function
Function
155/622/2488 Mbits/s Data Interface
TDAT042G5 SONET/SDH
Default
Reset
Default
0x00
0x20
Reset
0x0
0x0
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