tdat04622 ETC-unknow, tdat04622 Datasheet - Page 97

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
Functional Description
Path Terminator (PT) Block
SPE Generate (continued)
BIP-8. The PBIP block calculates the B3 value according to Bellcore and ITU standards. Insertion of PBIP errors is
possible through the use of a software control register.
REI Generation. The REI_P block controls the insertion of the remote error indication block error count. The
received PBIP error counts are inserted into the path status (G1) byte.
RDI-P Generation. The transmit path can insert remote defect indications using either single-bit or enhanced
RDI-P modes (provisionable via software register bit TRDIP_ENH_OR1B[A—D]; see register description, page
202). The highest to lowest priority of the defect code insertion is as follows:
1. AIS-P , LOP-P (applies only to the single-bit version of RDI-P),
2. UNEQ-P,
3. PLM-P , LCD-P ,
4. No defects
TIM-P can be inserted using software through TRDIPSINS (registers 0x0AAA, 0x0AB2, 0x0ABA, or 0x0AC2,
bits 15—11; see register description, page 201). The LCD-P defect is observed in the data engine and passed to
the pointer block for transmission. Each particular defect can be inhibited from contributing to the transmitted
RDI-P insertion value via software registers 0x0AAA, 0x0AB2, 0x0ABA, and 0x0AC2. RDI_P can either be inserted
by software or automatically through hardware.
Z5/N1, Z4/K4, Z3/F3, H4, F2 Insertion. TDAT042G5 inserts the F2 user channel byte, the H4 VT multiframe indi-
cator byte, Z3/F3 growth/user byte, Z4/K4 growth/APS path byte, and the Z5/N1 tandem connection byte via soft-
ware provisioning.
Error Insertion Mechanisms. TDAT042G5 provides a method to inject via software REI-P
(TREIPERRINS[A—D]) and B3 (TB3ERRINS[A—D]) errors into the transmitted SONET frame (see register
descriptions, page 202).
Insertion of J1, F2, C2, Z3, H4, Z4, Z5, SS Values. TDAT042G5 provides paged provisionable registers to insert
the path overhead bytes into the outgoing SONET frame. The paging is done by first writing to the page provision-
ing register at location 0x0AC6 to set the port number and time slot to be provisioned, and then writing to the
appropriate insertion registers. Available time-slot values for TDAT042G5 are time slot 1 for STS-48c mode; time
slots 1, 2, 3, and 4 for STS-48 consisting of four STS-Mc (M ≤ 12) signals; and time slot 1 for quad STS-12c and
quad STS-3c modes (ports A, B, C, and D configured for quad STS-3c and quad STS-12c).
(continued)
(continued)
155/622/2488 Mbits/s Data Interface
TDAT042G5 SONET/SDH
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