tdat04622 ETC-unknow, tdat04622 Datasheet - Page 4

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

for Version 1 and 1A of the Device
System Programming (SP)
SP2. Behavior During Loss of Receive Line Clock
All state and counter values will be held at their current values when Rx line clock has been lost. The device will not
automatically multiplex in the Tx line clock when the Rx line clock is lost.
Workaround
System software should monitor loss of line clock bits in the receive/transmit state register (addresses 0x040A—
0x040D) and ignore all other alarms. This condition must be serviced as a major failure event.
Corrective Action
This is informational only. No corrective action is required for this condition.
SP3. PT Register Addressing
Addresses for the PT error counter registers are as follows:
I
I
I
I
Note: The reserved address space between the error counter registers is not symmetric. (The reserved space
Workaround
This is informational only. No workaround is available for this condition.
Corrective Action
No corrective action is required for this condition.
2
Channel A: 0x09B3 to 0x09E3
Channel B: 0x09EF to 0x0A20
Channel C: 0x0A2C to 0x0A5C
Channel D: 0x0A68 to 0x0A98
between channels B and C is 0x003D, and the reserved space between channels A and B and channels
C and D is 0x003C.)
(continued)
Agere Systems Inc.
May 2001