tdat04622 ETC-unknow, tdat04622 Datasheet - Page 270

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

TDAT042G5 SONET/SDH
155/622/2488 Mbits/s Data Interface
Register Descriptions
DE Registers
Table 143. Registers 0x1120—0x1127: Receive Good Packet/Cell Counter (PMRST Update) (RO)
Reset default of registers = 0x0000.
242
1120—1127
Address
(Hex)
1120
1121
1122
1123
1124
1125
1126
1127
(continued)
15—12
15—12
15—12
15—12
11—0
15—0
11—0
15—0
11—0
15—0
11—0
15—0
Bit #
—
PM_GPC_RX_0[27:16] [11:4] is the MSByte of PM_GPC_RX_0.
PM_GPC_RX_1[27:16] [11:4] is the MSByte of PM_GPC_RX_1.
PM_GPC_RX_2[27:16] [11:4] is the MSByte of PM_GPC_RX_2.
PM_GPC_RX_3[27:16] [11:4] is the MSByte of PM_GPC_RX_3.
PM_GPC_RX_0[15:0]
PM_GPC_RX_1[15:0]
PM_GPC_RX_2[15:0]
PM_GPC_RX_3[15:0]
PM_GPC_RX_[0—3]
(continued)
Name
[27:0]
—
—
—
—
Good Packet/Cell Counter Channel
[0—3]. Keeps a count of good packets
detected by the receive data engine. This
value is updated upon PMRST, and the real-
time counter value is reset to zero. In ATM
mode, this counter counts the number of
good ATM cells received.
Reserved. These bits must be written to
their reset default value (0x0).
[7:0] is the LSByte of PM_GPC_RX_0.
Reserved. These bits must be written to
their reset default value (0x0).
[7:0] is the LSByte of PM_GPC_RX_1.
Reserved. These bits must be written to
their reset default value (0x0).
[7:0] is the LSByte of PM_GPC_RX_2.
Reserved. These bits must be written to
their reset default value (0x0).
[7:0] is the LSByte of PM_GPC_RX_3.
Function
Agere Systems Inc.
Reset Default
Data Sheet
0x0000
0x0000
0x0000
0x0000
0x0000
0x000
0x000
0x000
0x000
May 2001
0x0
0x0
0x0
0x0