tdat04622 ETC-unknow, tdat04622 Datasheet - Page 252

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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TDAT042G5 SONET/SDH
155/622/2488 Mbits/s Data Interface
Register Descriptions
DE Registers
Table 117. Registers 0x102E—0x1031: Over-Fiber Mode (Packet-Over-Fiber or POF) Control (R/W)
Reset default of registers = 0x0000.
224
Address
(Hex)
1030
1031
(continued)
15—14
13—10
15—14
13—10
Bit #
(continued)
9—8
7—6
5—2
1—0
9—8
7—6
5—2
1—0
Rx_CHCD_FM[15:0]
Rx_CHAB_FM[15:0]
(continued)
Name
Receive Channel C/D Framer Mode. This
register is used in over-fiber mode to give the Rx
sequencer prior knowledge of the time slot and
byte location within a time slot of the valid byte of a
transparent packet for a given frame.
Reserved. These bits must be written to their reset
default value (00).
Time slot having the last payload for channel C.
Last byte location out of 4-byte output for
channel C.
Reserved. These bits must be written to their reset
default value (00).
Time slot having the last payload for channel D.
Last byte location out of 4-byte output for
channel D.
Receive Channel A/B Framer Mode. This
register is used in over-fiber mode to give the Rx
sequencer prior knowledge of the time slot and
byte location within a time slot of the valid byte of a
transparent packet for a given frame.
Reserved. These bits must be written to their reset
default value (00).
Time slot having the last payload for channel A.
Last byte location out of 4-byte output for
channel A.
Reserved. These bits must be written to their reset
default value (00).
Time slot having the last payload for channel B.
Last byte location out of 4-byte output for
channel B.
Function
Agere Systems Inc.
Data Sheet
May 2001
Default
0x0000
0x0000
Reset

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