tdat04622 ETC-unknow, tdat04622 Datasheet - Page 98

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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TDAT042G5 SONET/SDH
155/622/2488 Mbits/s Data Interface
Functional Description
Data Engine (DE) Block
The DE block processes ATM, SDL, PPP, and HDLC cells/packets at rates up to 2.488 Gbits/s. The DE block
behaves like four independent logical data channels, one for each of the four STS-12/STM-4 or STS-3/STM-1
channels, or like a separate single channel for STS-48/STM-16. The following description is for each one of these
data engines. Each of the functional elements to be described are independently provisioned.
The data engine supports both ATM cells and packet data formats.
I
I
The block diagram for the data engine is shown in Figure 13.
70
The ATM processor functions with 52-byte, 53-byte, and 56-byte ATM cells.
The packet processor has three packet modes: HDLC, CRC, and PP P. All three modes use HDLC framing, i.e.,
0x7E delineates the packets. In HDLC mode, the 0x7E framing bytes are inserted or detected by the data
engine. In the CRC mode, a user-selectable 16-bit or 32-bit CRC word is appended or detected at the end of the
packet. The PPP mode places or detects a PPP header on the front of the packet as well as uses the CRC word.
INTERFACE
INTERFACE
PT
PT
SEQUENCER
SEQUENCER
RX
TX
UNSCRAMBLER
SCRAMBLER
POST-
POST-
X43
X43
Figure 13. Block Diagram of Date Engine (DE)
(continued)
CBINT
INSERTER
INSERTER
INSERTER
FRAMER
FRAMER
FRAMER
HDLC
HDLC
TRANSMIT-SIDE DE BLOCK
ATM
ATM
SDL
SDL
RECEIVE-SIDE DE BLOCK
CBINT
PRESCRAMBLER
UNSCRAMBLER
PRE-
X43
X43
GENERATOR
CHECKER
CRC
CRC
DETACH
ATTACH
PPP
PPP
Agere Systems Inc.
Data Sheet
INTERFACE
INTERFACE
May 2001
UT
UT
5-8385(F)r.2

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