tdat04622 ETC-unknow, tdat04622 Datasheet - Page 207

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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Data Sheet
May 2001
Agere Systems Inc.
Register Descriptions
OHP Registers
Table 80. Registers 0x042E: Transmit Control Port A (R/W) (continued)
Reset default of registers = 0x0003.
Address
(Hex)
042E
Bit #
3
2
1
0
(continued)
TM1_REIL_INH[A]
TM1_ERR_INS[A]
(continued)
TS1INS[A]
TF1INS[A]
Name
Transmit M1 Error Insert Channel A. Once
this register is set to 1, an error will be inserted
continuously into the outgoing M1 byte until this
register is reset to 0. In STS-48/STM-16 mode,
only TM1_ERR_INS is valid.
Transmit M1 REI-L Inhibit Channel A. Active-
high to inhibit automatic insertion of REI-L
(MS-REI). In STS-48/STM-16 mode, only
TM1_REIL_INH is valid.
Transmit F1 Insert Control Channel A. Con-
trol bit, when set to a logic 1, inserts the value in
TF1DINS[7:0] into the outgoing F1 byte in the
STS-M frame; otherwise, the insert value
depends on TTOAC_F1 register. TF1INS[A] is
valid in STS-48/STM-16 mode.
Transmit S1 Insert Control Channel A. Con-
trol bit, when set to a logic 1, inserts the value in
TS1DINS[7:0] into the outgoing S1 byte in the
STS-M frame; otherwise, the insert value
depends on TTOAC_S1 register. TS1INS[A] is
valid in STS-48/STM-16 mode.
155/622/2488 Mbits/s Data Interface
Function
TDAT042G5 SONET/SDH
Default
Reset
0
0
1
1
179

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