tdat04622 ETC-unknow, tdat04622 Datasheet - Page 119

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
Functional Description
UTOPIA (UT) Interface Block
UT Receive Input Path (Ingress) (continued)
Figure 23 illustrates the receive-side interface handshaking when operating in point-to-point mode with the RxPA
response provisioned to be a single cycle. In two-cycle mode, the RxSOP, RxDATA, and RxPA signals are
delayed an additional cycle. In the figure, the master device initiates the transfer after observing an asserted
packet available for the channel. The TDAT042G5 samples RxENB low on the first cycle and then asserts
RxSOP/C and RxDATA on the second cycle. RxDATA is sampled on the rising edge of the second cycle by the
master device. Figure 24 illustrates receive-side interface handshaking when operating in two-cycle mode. When
operating in U3+ mode, two-cycle mode must be used.
In this example, the master stops transfer in the middle of the packet. Data with value c is valid on the cycle that
RxENB goes inactive, and when RxENB returns, data is again valid on the first cycle after the slave observes an
active RxENB (data value d).
The packet transfer is complete when the slave asserts the RxEOP signal. If an error occurs in the packet, then the
RxERR signal is asserted simultaneously with the RxEOP. RxERR is ignored if it is not asserted when RxEOP is
active.
The packet transfer is complete when the slave asserts the RxEOP signal. If an error occurs in the packet, then the
RxERR signal is asserted simultaneously with the RxEOP. RxERR is ignored if it is not asserted when RxEOP is
active.
RxDATA[15:0]
Figure 23. Receive-Side Interface Handshaking in Point-to-Point, Single Cycle Mode
RxSOP/C
RxEOP
RxERR
RxENB
RxCLK
RxPA
1
2
(continued)
(continued)
3
4
a
5
b
6
c
7
8
155/622/2488 Mbits/s Data Interface
d
9
e
10
TDAT042G5 SONET/SDH
11
12
5-7450(F).ar.2
91