tdat04622 ETC-unknow, tdat04622 Datasheet - Page 307

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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Data Sheet
May 2001
Agere Systems Inc.
DS98-193SONT-4 Replaces DS98-193SONT-3 to Incorporate the Following
Updates
54.Page 143, Register Maps section, corrected subtitle in DE map from PPP Detach—Rx Good Packet/Cell
55.Page 143, Register Maps section, corrected subtitle in DE map from PPP Attach—Tx Good Packet/Cell
56.Page 150, updated register description of PLL_MODE bit (address 0x0010).
57.Page 151, Table 50, Register 0x0012: Loopback Control (R/W), updated description of valid combinations.
58.Page 157 and page158, clarified UTOPIA_MODE_Rx bit (addresses 0x020F, 0x0213, 0x0217, 0x021B) in the
59.Page 158, Table 61, Registers 0x020F, 0x0213, 0x0217, 0x021B: Channel [A—D] Receive Provisioning Regis-
60.Page 158, clarified ATM_SIZE_Rx[A—D] bits (addresses 0x020F, 0x0213, 0x0217, 0x021B).
61.Page 160, corrected description of PARITY_Tx[A] bit (addresses 0x0210, 0x0214, 0x0218, 0x021C). Corrected
62.Page 160, clarified PARITY_Tx[B—D] bits (addresses 0x0210, 0x0214, 0x0218, 0x021C).
63.Page 160, clarified ATM_SIZE_Tx[A—D] bits (addresses 0x0210, 0x0214, 0x0218, 0x021C) and corrected
64.Page 161, Table 63, Bits 13—8, INGRESS_WATERMARK_HIGH_[A—D][6:0], changed the function definition
65.Pages 165—page 167, Table 72, Registers 0x0402—0x0409: Delta/Event (COR/W), deleted statement that the
66.Page 171, Table 76, Registers 0x0416—0x0419: Toggles (R/W), corrected and expanded note.
67.Page 173, LOS_AISINH[A—D] bit (addresses 0x0422, 0x0424, 0x0426, 0x0428), clarified the description.
68.Page 177 and page181, TJ0INS and TTOAC_J0 bits (addresses 0x042E, 0x0430, 0x0432, 0x0434), updated
69.Page 179 and page183, TM1_ERR_INS and TM1_REIL_INH bits (addresses 0x042E, 0x0430, 0x0432,
70.Page 200 and page201, RFORCE_LOP[A—D][1—12] and RFORCE_AIS[A—D] [1—12] bits
71.Page 201, Table 103, address 0AAA, 0AB2, 0ABA, OAC2, bit 9, name TRDIP_LCD[A—D], changed the func-
72.Page 201 and page 202, TRDIP_LCD[A—D], TRDIP_PLMPINH[A—D], TRDIP_UNEQUIPINH [A—D] bits, cor-
73.Page 212 and page 213, Table 112, Register 0x1001, 0x1002: DE Interrupts (0x1001 is RO, 0x1002 is RO and
74.Page 226, Table 120, Receive Type and Mode Control Summary Table (Registers 0x1040—0x1043), clarified
75.Page 235, PPP_Rx_HDR [0—11][15:0] registers (addresses 0x10F0—0x10FB), corrected name and descrip-
76.Page 236, PPP_Rx_CHK_CH [0—3][15:0] registers (addresses 0x10FC—0x10FF), bits 15—14, updated
Counter (PMRST Update) to Receive Good Packet/Cell Counter (PMRST Update).
Counter (PMRST Update) to Transmit Good Packet/Cell Counter (PMRST Update).
Register Maps and Register Descriptions sections.
ter (R/W), corrected the reset default value of register 0x0217 from 0x0020 to 0x0220.
even parity from bit = 1 to bit = 0.
“received” to “transmitted.”
to current one.
delta bits clear when read (or written).
description.
0x0434), updated description.
(addresses 0x0AA7, 0x0AA8, 0x0AA9), updated description.
tion definition to the current one.
rected the bit numbers from 7, 9, 8, to the bit numbers 9, 8, 7, respectively.
COR/W), register 0x1002, updated note, added footnote, and corrected the placement of bits of 7—4 and 3—0
which were interposed.
bits [1:0] for ATM.
tion.
description.
(continued)
155/622/2488 Mbits/s Data Interface
TDAT042G5 SONET/SDH
279

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