tdat04622 ETC-unknow, tdat04622 Datasheet - Page 188

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

TDAT042G5 SONET/SDH
155/622/2488 Mbits/s Data Interface
Register Descriptions
UT Registers
UT Provisioning Registers (R/W) (continued)
Table 62. Registers 0x0210, 0x0214, 0x0218, 0x021C: Channel [A—D] Transmit Provisioning Register (R/W)
Reset default of register 0x0210 = 0x0000.
Reset default of register 0x0214 = 0x0120.
Reset default of register 0x0218 = 0x0220.
Reset default of register 0x021C = 0x0320.
160
0210, 0214,
0218, 021C
Address
(Hex)
(continued)
Bit #
2—0
(continued)
5
4
3
ATM_SIZE_Tx[A—D]
TRAFFIC_TYPE_Tx
UTOPIA_MODE_Tx
PARITY_Tx[B—D]
PARITY_Tx[A]
(continued)
[A—D][2:0]
[A—D]
Name
Parity Transmit Channel [A—D]. Defines if
odd (bit = 1) or even (bit = 0) parity is generated
for the data transmitted across the UTOPIA
PHY Tx interface. Default is even for channel A
and odd for channels B, C, and D.
ATM Packet Size Transmit Channel [A—D].
Defines how many bytes are transmitted per
ATM cell. Default is 53 bytes. Valid only when
traffic type is ATM cells.
Page 86 and page 87 give details of the func-
tion of this bit.
0 = standard 53-byte (also 54-byte and 56-byte)
ATM cell modes.
1 = 52-byte ATM cell mode (HEC omitted).
Traffic Type Transmit Channel [A—D]. Con-
figures channel to transmit either ATM cells or
packets.
Bit Value
UTOPIA Mode Transmit Channel [A—D].
Configures the Tx channel mode.
Mode
disabled (idle)
U2
U2+
U3, 8-bit
U3, 32-bit
U3+, 8-bit
U3+, 32-bit
invalid
U3 configuration also requires appropriate set-
ting of register 0x0225 (PA response) to be set
for a two-cycle response.
0
1
packets (default)
ATM cells
Traffic Type
bits[2:0] = 001
bits[2:0] = 010
bits[2:0] = 011
bits[2:0] = 101
bits[2:0] = 000
bits[2:0] = 100
bits[2:0] = 110
bits[2:0] = 111
Function
Bit Value
Agere Systems Inc.
Data Sheet
Default
Reset
May 2001
000
0
1
0
0