tdat04622 ETC-unknow, tdat04622 Datasheet - Page 230

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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TDAT042G5 SONET/SDH
155/622/2488 Mbits/s Data Interface
Register Descriptions
PT Registers
Table 103. Registers 0x0AA6—0x0AAD, 0x0AAE, 0x0AB5, 0x0AB6—0x0ABD, 0x0ABE—0x0AC5: PT Con-
Reset default of registers 0x0AA6, 0x0AAE, 0x0AB6, 0x0ABE = 0xF200.
Reset default of registers 0x0AA7, 0x0AAF, 0x0AB7, 0x0ABF = 0x0000.
Reset default of registers 0x0AA8, 0x0AB0, 0x0AB8, 0x0AC0 = 0x0FFF.
Reset default of registers 0x0AA9, 0x0AB1, 0x0AB9, 0x0AC1 = 0x0000.
Reset default of registers 0x0AAA, 0x0AB2, 0x0ABA, 0x0AC2 = 0x0000.
Reset default of registers 0x0AAB, 0x0AB3, 0x0ABB, 0x0AC3 = 0x1AAA.
Reset default of registers 0x0AAC, 0x0AB4, 0x0ABC, 0x0AC4 = 0x3AAA.
Reset default of registers 0x0AAD, 0x0AB5, 0x0ABD, 0x0AC5 = 0x3333.
202
0AAA, 0AB2,
0ABA, 0AC2
Address
(Hex)
trol Parameters (R/W) (continued)
(continued)
Bit #
7
6
5
4
3
2
1
0
TRDIP_ENH_OR1B[A—D] Transmit RDI-P Enhanced or 1-Bit
TRDIP_LOPPINH[A—D]
TRDIP_UNEQUIPINH
TRDIP_AISINH[A—D]
TREIPERRINS[A—D]
TB3ERRINS[A—D]
TJ1SINS[A—D]
(continued)
[A—D]
Name
Transmit RDI-P UNEQUIP Inhibit. Control bit,
when set, causes the UNEQUIP failure to not
contribute to RDI-P generation.
Transmit RDI-P LOP-P Inhibit. Control bit,
when set, causes the LOP-P failure to not
contribute to RDI-P generation.
Transmit RDI-P AIS-P Inhibit. Control bit,
when set, causes the AIS-P failure to not
contribute to RDI-P generation.
Monitoring. Control bit, when set, causes
enhanced failure code insert to occur on the
G1[3:1] bits; otherwise, inserts a single bit
failure code into G1[3].
Transmit REI-P Error Insert. Control bit, when
set, causes an error to be continuously injected
into the G1[7:4] bits.
Transmit B3 Error Insert. Control bit, when
set, causes the B3 value to be inverted.
Transmit J1 Software Insert. Control bit, when
set, causes the J1 byte stored in the
TJ1DINS[A—D][1—64][7:0] register to be
injected into the outgoing J1 byte; otherwise,
inserts 0x00 into the J1 byte.
Reserved. This bit must be written to its reset
default value (0).
Function
Agere Systems Inc.
Data Sheet
May 2001
Default
Reset
0
0
0
0
0
0
0
0

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