tdat04622 ETC-unknow, tdat04622 Datasheet - Page 38

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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TDAT042G5 SONET/SDH
Data Sheet
155/622/2488 Mbits/s Data Interface
May 2001
List of Tables
(continued)
Contents
Page
Table 145. Registers 0x1180—0x1186: Interrupt Masks for Packet Counters (R/W) ..........................................243
Table 146. Registers 0x1181—0x1187: Interrupts for Packet Counters (COR/W) ..............................................244
Table 147. Registers 0x1200—0x1213, 0x12F0: ATM Transmit Registers (R/W) ...............................................244
Table 148. Registers 0x1400—0x1403: SDL State Registers (RO) .....................................................................246
Table 149. Registers 0x1470—0x1473: A Message Mailbox Registers (RO) ......................................................247
Table 150. Registers 0x1480—0x1483: A Message Mailbox Registers (RO) ......................................................247
Table 151. Registers 0x1490—0x1493: A Message Mailbox Registers (RO) ......................................................247
Table 152. Registers 0x14A0—0x14A3: B Message Mailbox Registers (RO) .....................................................247
Table 153. Registers 0x14B0—0x14B3: B Message Mailbox Registers (RO) .....................................................248
Table 154. Registers 0x14C0—0x14C3: B Message Mailbox Registers (RO) .....................................................248
Table 155. Registers 0x14D0—0x14D3: SDL Interrupt Masks (R/W) ..................................................................248
Table 156. Registers 0x14E0—0x14E3: SDL Interrupts (COR/W) ......................................................................249
Table 157. Register 0x14F0: SDL Receive Configuration Registers (R/W) .........................................................249
Table 158. Registers 0x1600—0x1607: SDL Transmit Registers (R/W) ..............................................................250
Table 159. Recommended Operating Conditions ................................................................................................254
Table 160. 3.3 V Logic Interface Characteristics ..................................................................................................254
Table 161. LVPECL Interface Characteristics ......................................................................................................254
Table 162. LVPECL 3.3 V Logic Interface Characteristics ...................................................................................255
Table 163. Microprocessor Interface Synchronous Write Cycle Specifications ...................................................257
Table 164. Microprocessor Interface Synchronous Read Cycle Specifications ...................................................259
Table 165. Microprocessor Interface Asynchronous Write Cycle Specifications ..................................................261
Table 166. Microprocessor Interface Asynchronous Read Cycle Specifications .................................................263
Table 167. Receive Line-Side Timing Specifications ...........................................................................................266
Table 168. Transmit Line-Side Timing Specifications ..........................................................................................267
Table 169. Transmit UTOPIA Interface Timing Specifications .............................................................................268
Table 170. Receive UTOPIA Interface Timing Specifications ..............................................................................269
Table 171. UTOPIA Interface Clock Specifications ..............................................................................................270
Table 172. Transmit TOAC Interface Timing Specifications .................................................................................271
Table 173. Receive TOAC Interface Timing Specifications ..................................................................................272
Table 174. SONET/SDH Comparisons ................................................................................................................274
Table 175. SONET/SDH New Terminology ..........................................................................................................274
10
Agere Systems Inc.

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