tdat04622 ETC-unknow, tdat04622 Datasheet - Page 257

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tdat04622

Manufacturer Part Number
tdat04622
Description
Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
Manufacturer
ETC-unknow
Datasheet

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Data Sheet
May 2001
Agere Systems Inc.
Register Descriptions
DE Registers
Table 125. Registers 0x10A0—0x10A3: ATM Framer State Registers (RO)
Reset default of registers = 0x0000.
Table 126. Register 0x10A4: ATM X43 Frame Control (R/W)
Reset default of register = 0x01C6.
10A0—10A3
Address
Address
(Hex)
(Hex)
10A4
15—12
15—4
11—6
Bit #
3—2
1—0
(continued)
Bit #
5—0
ATM_ST_[0—3]
ATM_X43[11:0]
(continued)
Name
Name
Channel [0—3] ATM Scrambler Framer
State.
Reserved. These bits must be written to their
reset default value (0x000).
ATM Framer Sync State. These bits indicate
the X31 sync state of each channel.
ATM_ST_[0—3][3:2] = 00 Acquisition
ATM_ST_[0—3][3:2] = 01 Verification
ATM_ST_[0—3][3:2] = 10 Synchronized
ATM_ST_[0—3][3:2] = 11 Undefined
ATM Frame State. These bits indicate the
frame state of each channel.
ATM_ST_[0—3][1:0] = 00 Hunt
ATM_ST_[0—3][1:0] = 01 Presync
ATM_ST_[0—3][1:0] = 10 Sync
ATM_ST_[0—3][1:0] = 11 Undefined
ATM X43 Frame Control.
Reserved. These bits must be written to their
reset default value (0x0).
X43-Alpha. This register will define the alpha
value for the X43 alpha-delta framer which is
the number of consecutive incorrect ATM cells
that must be received in order to transition from
the sync state to the hunt state.
X43-Delta. This register will define the delta
value for the X43 alpha-delta framer which is
the number of consecutive correct ATM cells
that must be received in order to transition from
the presync state to the sync state.
Function
155/622/2488 Mbits/s Data Interface
Function
TDAT042G5 SONET/SDH
Default
0x0000
Reset
0x000
0x01C6
Default
000111
000110
Reset
00
00
0x0
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