tdat04622 ETC-unknow, tdat04622 Datasheet - Page 89

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
Functional Description
Overhead Processor (OHP) Block
Transmit OHP (continued)
BIP-8 Generation. The SBIP block calculates the B1 value according to Bellcore and ITU standards. Insertion of
SBIP errors is possible through the use of software control register TB1ERRINS[A—D] (see register description,
page 180).
The LBIP block calculates the B2 values according to Bellcore and ITU standards. Insertion of LBIP errors is pos-
sible through the use of software control register TB2ERRINS[A—D] (see register description, page 180).
The REI_L block controls the insertion of the remote error indication block error count.
J0 Section Trace. The section trace message is inserted either from the TxTOH interface or from a message
stored in a 16-byte software-accessible memory. Control for message insertion is from software control register
TJ0INS[A—D] (see register description, page 177 and page 181).
SONET Scrambler. The scrambler block implements the frame synchronous SONET scrambler with a generating
polynomial of 1 + x
A1/A2 Framing Bytes. A1 and A2 are automatically placed on the line. Errors can be inserted into A2 by setting
OHP register TA1A2ERRINS[A—D][4:0] (see register description, page 180).
E1/E2 Orderwire Bytes. The orderwire bytes for section and line are taken from the TOAC.
D1/D2/D3 Section Data Communications Channels (DCC). DCC inputs are taken from the TOAC.
D4—D12 Line Data Communications Channels (DCC). DCC inputs are taken from the TOAC.
F1 User Channel. The F1 byte can be optionally inserted from stored values in OHP register TF1INS[A—D]
(addresses 0x047E, 0x0480, 0x0482, 0x0484; see register description, page 179 and page 183).
M1 REI-L. REI-L can be automatically generated and inserted into the outgoing SONET frame, or can optionally
be inhibited. Errors can be inserted into M1 via OHP register TM1_ERR_INS[A—D] (addresses 0x042E, 0x0430,
0x0432, 0x0434; see register description, page 179 and page 183).
Support for ATM/Packet-Over-Fiber. The transport overhead must be bypassed when operating in data-over-
fiber mode. In this mode, the TOH_BYPASS and ROH_BYPASS register bits must be set to 1. No overhead inser-
tion/extraction is done when in bypass mode.
6
+ x
7
. The scrambler may be disabled through a software register.
(continued)
(continued)
155/622/2488 Mbits/s Data Interface
TDAT042G5 SONET/SDH
61