tdat04622 ETC-unknow, tdat04622 Datasheet - Page 139

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
Register Access Description
Register address space is defined by the 16-bit address word of ADDR[15:0] (see Table 6, page 41). Bits 15
through 13 must be 0. Bits 12 through 9 map to the major functional blocks as shown in Table 35. The usable
address space is also shown in Table 35.
Table 35. Register Address Space
Register addresses outside of the space defined in Table 35 must not be addressed, i.e., written or read.
Table 36—Table 40 are the register maps. Details of the register functions are given in the following register
description tables. Note that the usable register address space is not contiguous. Register addresses not specifi-
cally identified in the following tables are reserved and must not be addressed, i.e., written or read. Registers and
bits that are reserved must not be written or must be written to the indicated default value. In Table 36—Table 40,
the registers may be read only (RO), read/write (R/W), write only (WO), or clear-on-read or clear-on-write
(COR/W).
The core registers must be written prior to provisioning any other registers (1) to establish the internal clock rates
for the device, and (2) because writing to certain core registers resets the remainder of the device. Certain clocks
must be present to read/write registers prior to provisioning the device.
One of the following clocks must be present prior to provisioning to enable register access.
I
I
Provisioning must be implemented in the following sequence.
I
I
I
It is recommended, but not required, that the remainder of the device be provisioned in the following order.
I
I
TxCKP and TxCKN
MPU clock (microprocessor interface synchronous mode only)
Core register 0x0010 (mode) must be provisioned first
Core register 0x0011 (channel [A—D] control) second
Remainder of the core registers must then be provisioned (order does not matter)
OHP , PT, and DE blocks (order does not matter)
UT block to turn on the data source to the master and slave
Functional Block
Core
OHP
UT
DE
PT
Address Range (Hex)
0x0400—0x05C2
0x0800—0x0AF8
0x0000—0x001F
0x0200—0x0226
0x1000—0x1607
155/622/2488 Mbits/s Data Interface
TDAT042G5 SONET/SDH
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