tdat04622 ETC-unknow, tdat04622 Datasheet - Page 177

• Manufacturer Part Number: tdat04622
• Description: Tdat Sonet/sdh 155/622/2488 Mbits/s Data Interfaces
• Manufacturer: ETC-unknow

Data Sheet
May 2001
Agere Systems Inc.
Register Descriptions
Core Registers
Table 45. Register 0x000C: Block Interrupt Masks (R/W)
Reset default of register = 0xFFFF.
Table 46. Register 0x000E: Core Resets (WO)
Address
Address
(Hex)
(Hex)
000C
000E
14—12
11—8
15—8
Bit #
5—2
Bit #
6—3
2—0
15
7
6
1
0
7
(continued)
GPIO[3:0]IM
(continued)
PMRSTM
SWRST
PMRST
OHPIM
Name
Name
UTIM
DEIM
PTIM
—
—
—
—
Performance Monitor Reset Mask. When set to 1,
the associated composite interrupt bit will be inhib-
ited (masked) from contributing to the interrupt pin
(INT).
Reserved. These bits must be written to their reset
default value (111).
General-Purpose Interrupt Mask. When set to 1,
the associated composite interrupt bits will be inhib-
ited (masked) from contributing to the interrupt pin
(INT).
UTOPIA Composite Interrupt Mask. When set to
1, the associated composite interrupt bit will be
inhibited (masked) from contributing to the interrupt
pin (INT).
Data Engine Composite Interrupt Mask. When
set to 1, the associated composite interrupt bit will
be inhibited (masked) from contributing to the inter-
rupt pin (INT).
Reserved. These bits must be written to their reset
default value (1111).
Path Terminator Composite Interrupt Mask.
When set to 1, the associated composite interrupt
bit will be inhibited (masked) from contributing to
the interrupt pin (INT).
Overhead Processor Composite Interrupt Mask.
When set to 1, the associated composite interrupt
bit will be inhibited (masked) from contributing to
the interrupt pin (INT).
Reserved.
Performance Monitor Reset. When this bit is set
to 1, the PMRST signal goes high. The register will
automatically be reset to 0, and the PMRST signal
will go low after 500 ms.
Reserved.
Software Reset. When a binary value of 101 is
written to this register, it will create a software reset
of the device. This reset has the same effect as the
hardware reset. All microprocessor registers are
reset to their default states, and all internal data
path state machines are reset.
155/622/2488 Mbits/s Data Interface
Function
Function
TDAT042G5 SONET/SDH
Default
Default
Reset
Reset
1111
111
0xF
NA
NA
NA
NA
1
1
1
1
1
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