SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 141

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

7.2
7.2.1
ARM DDI 0165B
Debug systems
The debug host
Debug
Debug
host
host
The ARM9E-S forms one component of a debug system that interfaces from the
high-level debugging performed by the user to the low-level interface supported by the
ARM9E-S. Figure 7-1 shows a typical debug system.
A debug system typically has three parts:
•
•
•
The debug host and the protocol converter are system-dependent.
The debug host is a computer running a software debugger, such as armsd. The debug
host allows you to issue high-level commands such as setting breakpoints or examining
the contents of memory.
The debug host
The protocol converter on page 7-4
The ARM9E-S on page 7-4 (the debug target).
Host computer running ARM or third-party toolkit
Copyright © 2000 ARM Limited. All rights reserved.
converter
Protocol
For example, Multi-ICE
Debug
target
Development system containing ARM9E-S
Debug Interface and EmbeddedICE-RT
Figure 7-1 Typical debug system
7-3