SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 258

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug in depth
C.7
C.7.1
C-18
Determining the core and system state
Determining the core state
is
When the ARM9E-S is in debug state, you can examine the core and system state by
forcing the load and store multiples into the instruction pipeline.
Before examining the core and system state, the debugger must determine whether the
processor entered debug from Thumb state or ARM state by examining bit 4 of the
EmbeddedICE-RT debug status register. When bit 4 is HIGH, the core has entered
debug from Thumb state. When bit 4 is LOW the core has entered debug from ARM
state.
When the processor has entered debug state from Thumb state, the simplest method is
for the debugger to force the core back into ARM state. The debugger can then execute
the same sequence of instructions to determine the processor state.
To force the processor into ARM state, execute the following sequence of Thumb
instructions on the core (with the SYSSPEED bit set LOW):
STR R0, [R1]; Save R0 before use
MOV R0, PC
STR R0, [R1]; Now save the PC in R0
BX
MOV R8, R8
MOV R8, R8
Because all Thumb instructions are only 16 bits long, the simplest method, when
shifting scan chain 1, is to repeat the instruction. For example, the encoding for
to keep track of the half of the bus on which the processor expects to read the data.
You can use the sequences of ARM instructions shown in Example C-1 on page C-19
to determine the processor state.
With the processor in the ARM state, typically the first instruction to execute is:
STMIA R0, {R0-R15}
This instruction causes the contents of the registers to appear on the data bus. You can
then sample and shift out these values.
0x4700
PC
Note
Copyright © 2000 ARM Limited. All rights reserved.
, so when
; Copy PC into R0
; Jump into ARM state
; NOP
; NOP
0x47004700
shifts into scan chain 1, the debugger does not have
ARM DDI 0165B
BX
R0