SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 72

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Device Reset
3.1
3-2
About device reset
This section describes the ARM9E-S reset signals and how you must use them for
correct operation of the device.
The ARM9E-S has two reset inputs:
nRESET
DBGnTRST The DBGnTRST signal is the debug logic reset that you can use to reset
Both nRESET and DBGnTRST are active LOW signals that asynchronously reset
logic in the ARM9E-S. You must take care when designing the logic to drive these reset
signals.
Copyright © 2000 ARM Limited. All rights reserved.
The nRESET signal is the main CPU reset that initializes the majority of
the ARM9E-S logic.
the ARM9E-S TAP controller and the EmbeddedICE-RT unit.
ARM DDI 0165B