SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 256

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Debug in depth
C-16
Scan chain 2
Purpose
Length
Scan chain order
No action occurs during CAPTURE-DR.
During SHIFT-DR, a data value is shifted into the serial register. Bits 32 to 36 specify
the address of the EmbeddedICE register to be accessed.
During UPDATE-DR, this register is either read or written depending on the value of
bit 37 (0 = read, 1 = write).
Copyright © 2000 ARM Limited. All rights reserved.
Scan chain 2 allows access to the EmbeddedICE registers. To do
this, scan chain 2 must be selected using the SCAN_N instruction,
and then the TAP controller instruction must be changed to
INTEST.
38 bits.
From DBGTDI to DBGTDO. Read/write, register address bits 4
to 0, data values bits 31 to 0.
ARM DDI 0165B

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