SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 266

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug in depth
C.8.5
C.8.6
C.8.7
C-26
Debug request
System speed access
Summary of return address calculations
Entry into debug state through a debug request is similar to a breakpoint. Entry to debug
state adds four addresses to the PC, and every instruction executed in debug state adds
one address.
For example, the following sequence handles a situation in which the user has invoked
a debug request, and then decides to return to program execution immediately:
0 EAFFFFFB; B -5 addresses (2’s complement)
1 E1A00000; NOP (MOV R0, R0), SYSSPEED bit is set
This code restores the PC, and restarts the program from the next instruction.
When a system speed access is performed during debug state, the value of the PC
increases by five addresses. System speed instructions access the memory system, and
so it is possible for aborts to take place. If an abort occurs during a system speed
memory access, the ARM9E-S enters Abort mode before returning to debug state.
This scenario is similar to an aborted watchpoint, but the problem is much harder to fix
because the abort is not caused by an instruction in the main program, and so the PC
does not point to the instruction that caused the abort. An abort handler usually looks at
the PC to determine the instruction that caused the abort, and the abort address. In this
case, the value of the PC is invalid, but because the debugger can determine which
location was being accessed, you can write the debugger to help the abort handler fix
the memory system.
The calculation of the branch return address can be summarized as:
-(4+N+5S)
where
branch), and
N
Copyright © 2000 ARM Limited. All rights reserved.
is the number of debug speed instructions executed (including the final
S
is the number of system speed instructions executed.
ARM DDI 0165B