SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 222

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Signal Descriptions
A.1
A-2
Clock interface signals
The clock interface signals are given in Table A-1.
Name
CLK
System clock
CLKEN
Wait-state control
CORECLKENOUT
CORECLKENIN
Copyright © 2000 ARM Limited. All rights reserved.
Direction
Input
Input
Output
Input
Description
This clock times all operations in the ARM9E-S
processor. All outputs change from the rising edge
and all inputs are sampled on the rising edge. The
clock can be stretched in either phase. Synchronous
wait states can be added using the CLKEN signal.
Through the use of the DBGTCKEN signal, this
clock also times debug operations.
ARM9E-S can be stalled for integer clock cycles by
driving CLKEN LOW. This signal must be held
HIGH at all other times.
The principal state advance signal for the ARM9E-S
core. This output must be connected directly to the
CORECLKENIN input for correct operation. This
signal has been exported from the core to ease buffer
tree insertion from the CORECLKENIN input. You
must take care when loading and routing the
CORECLKENOUT to CORECLKENIN
connection.
This input must be connected to the
CORECLKENOUT output.
Table A-1 Clock interface signals
ARM DDI 0165B