SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 210

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
AC Parameters
9.1
9-2
Timing diagrams
The timing diagrams in this section are:
Instruction memory interface timing parameters are shown in Figure 9-1.
Figure 9-1 Instruction memory interface timing
Figure 9-2 Data memory interface timing on page 9-3
Figure 9-3 Clock enable timing on page 9-3
Figure 9-4 Coprocessor interface timing on page 9-4
Figure 9-5 Exception and configuration timing on page 9-4
Figure 9-6 Debug interface timing on page 9-5
Figure 9-7 Interrupt sensitivity status timing on page 9-5
Figure 9-8 JTAG interface timing on page 9-6
Figure 9-9 DBGSDOUT to DBGTDO relationship on page 9-7.
Copyright © 2000 ARM Limited. All rights reserved.
CLK
InMREQ,
ISEQ
IA[31:1]
InTRANS
InM[4:0]
ITBIT
INSTR[31:0]
IABORT
DBGIEBKPT
Figure 9-1 Instruction memory interface timing
T ovitrans
T oviaddr
T ovictl
Address
TRANS
Control
T isiabort
T isiebkpt
T isinstr
T ohitrans
T ohiaddr
T ohictl
ARM DDI 0165B
T ihinstr
T ihiabort
T ihiebkpt

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