SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 144

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Debug Interface and EmbeddedICE-RT
7.3
7-6
About EmbeddedICE-RT
The ARM9E-S EmbeddedICE-RT logic provides integrated on-chip debug support for
the ARM9E-S core.
EmbeddedICE-RT is programmed serially using the ARM9E-S TAP controller.
Figure 7-3 shows the relationship between the core, EmbeddedICE-RT, and the TAP
controller. It only shows the signals that are pertinent to EmbeddedICE-RT.
The EmbeddedICE-RT logic comprises:
The debug control register and the debug status register provide overall control of
EmbeddedICE-RT operation.
two real-time watchpoint units
two independent registers, the debug control register and the debug status register
debug comms channel.
Copyright © 2000 ARM Limited. All rights reserved.
Figure 7-3 The ARM9E-S, TAP controller, and EmbeddedICE-RT
Processor
EmbeddedICE-RT
TAP
ARM DDI 0165B

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