SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 73

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

3.2
3.2.1
ARM DDI 0165B
Reset modes
Power-on reset
Two reset signals are present in the ARM9E-S design to enable you to reset different
parts of the design independently. A description of the reset signaling combinations and
possible applications is shown in Table 3-1.
You must apply power-on or cold reset to the ARM9E-S when power is first applied to
the system. In the case of power-on reset, the leading (falling) edge of the reset signals
(nRESET and DBGnTRST) does not have to be synchronous to CLK. The trailing
(rising) edge of the reset signals must be set up and held about the rising edge of the
clock. You must do this to ensure that the entire system leaves reset in a predictable
manner. This is particularly important in multi-processor systems. Figure 3-1 shows the
application of power-on reset.
It is recommended that you assert the reset signals for at least three CLK cycles to
ensure correct reset behavior. Adopting a three-cycle reset eases the integration of other
ARM parts into the system, for example, ARM9TDMI based designs.
Reset mode
Power-on reset
CPU reset
EmbeddedICE-RT reset
Normal
Copyright © 2000 ARM Limited. All rights reserved.
nRESET
0
0
1
1
DBGnTRST
0
1
0
1
Application
Reset at power up, full system
reset.
Reset of CPU core only, watchdog
reset.
Reset of EmbeddedICE-RT
circuitry.
No reset. Normal run mode.
Figure 3-1 Power-on reset
Table 3-1 Reset modes
Device Reset
3-3