SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 252

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug in depth
C.5.4
C-12
Scan path select register
Purpose
Length
Operating mode
Table C-2 lists the scan chain numbers allocated by ARM.
Copyright © 2000 ARM Limited. All rights reserved.
Changes the current active scan chain.
5 bits.
the scan path select register as the serial path between DBGTDI
and DBGTDO.
During the CAPTURE-DR state, the value b10000 is loaded into
this register. This value is shifted out during SHIFT-DR (least
significant bit first), while a new value is shifted in (least
significant bit first). During the UPDATE-DR state, the value in
the scan path select register selects a scan chain to become the
currently active scan chain. All further instructions such as
INTEST then apply to that scan chain.
The currently selected scan chain changes only when a SCAN_N
instruction is executed, or when a reset occurs. On reset, scan
chain 3 is selected as the active scan chain.
The number of the currently-selected scan chain is reflected on the
DBGSCREG[4:0] output bus. You can use the TAP controller to
drive external chains in addition to those within the ARM9E-S
macrocell. The external scan chain is connected between
DBGSDIN and DBGSDOUT, and must be assigned a number.
The control signals are derived from DBGSCREG[4:0],
DBGIR[4:0], DBGTAPSM[3:0] and the clock, CLK, and clock
enable, DBGTCKEN.
SCAN_N as the current instruction in the SHIFT-DR state selects
Table C-2 Scan chain number allocation
Scan chain
number
0
1
2
Function
Reserved
Debug
EmbeddedICE-RT
programming
ARM DDI 0165B