DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 165

MCU 16BIT FLASH 3V 512K 144-TQFP

DF2166VT33WV

Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VT33WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.4.3
The LSI can output I/O select signals (IOS); the signal is driven low when the corresponding
external address space is accessed. Figure 6.2 shows an example of IOS signal output timing.
Enabling or disabling IOS signal output is performed by the IOSE bit in SYSCR. In the extended
mode, the IOS pin functions as an AS pin by a reset. To use this pin as an IOS pin, set the IOSE
bit to 1. For details, see section 8, I/O Ports.
The address ranges of the IOS signal output can be specified by the IOS1 and IOS0 bits in BCR,
as shown in table 6.15.
Table 6.15 Address Range for IOS Signal Output
IOS1
0
1
I/O Select Signals
IOS0
0
1
0
1
Address bus
φ
IOS
Figure 6.2 IOS Signal Output Timing
IOS Signal Output Range
H'FFF000 to H'FFF03F
H'FFF000 to H'FFF0FF
H'FFF000 to H'FFF3FF
H'FFF000 to H'FFF7FF
T
1
External addresses selected by IOS
Bus cycle
T
2
Rev. 3.00, 03/04, page 123 of 830
T
3
(Initial value)

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