DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 791

MCU 16BIT FLASH 3V 512K 144-TQFP

DF2166VT33WV

Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VT33WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The register list gives information on the on-chip I/O register addresses, how the register bits are
configured, and the register states in each operating mode. The information is given as shown
below.
1. Register Addresses (address order)
• Registers are listed from the lower allocation addresses.
• The MSB-side address is indicated for 16-bit addresses.
• Registers are classified by functional modules.
• The access size is indicated.
2. Register Bits
• Bit configurations of the registers are described in the same order as the Register Addresses
• Reserved bits are indicated by  in the bit name column.
• The bit number in the bit-name column indicates that the whole register is allocated as a
• 16-bit registers are indicated from the bit on the MSB side.
3. Register States in Each Operating Mode
• Register states are described in the same order as the Register Addresses (address order)
• The register states described here are for the basic operating modes. If there is a specific reset
24.1
The data bus width indicates the numbers of bits by which the register is accessed.
The number of access states indicates the number of states based on the specified reference clock.
Note: Access to undefined or reserved addresses is prohibited. Since operation or continued
(address order) above.
counter or for holding data.
above.
for an on-chip peripheral module, refer to the section on that on-chip peripheral module.
operation is not guaranteed when these registers are accessed, do not attempt such access.
Register Addresses (Address Order)
Section 24 List of Registers
Rev. 3.00, 03/04, page 749 of 830

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