DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 41

MCU 16BIT FLASH 3V 512K 144-TQFP

DF2166VT33WV

Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VT33WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 16.7
Table 16.8
Table 16.9
Table 16.10
Table 16.11
Table 16.12
Table 16.13
Section 17 D/A Converter
Table 17.1
Table 17.2
Section 18 A/D Converter
Table 18.1
Table 18.2
Table 18.3
Table 18.4
Section20 Flash Memory (0.18-µm F-ZTAT Version)
Table 20.1
Table 20.2
Table 20.3
Table 20.4
Table 20.5
Table 20.6
Table 20.7
Table 20.8 (1)
Table 20.8 (2)
Table 20.8 (3)
Table 20.8 (4)
Table 20.9
Table 20.10
Table 20.11
Table 20.12
Table 20.13
Table 20.14
Section 21 Boundary Scan (JTAG)
Table 21.1
Table 21.2
Table 21.3
Section 22 Clock Pulse Generator
Table 22.1
Table 22.2
Table 22.3
Fast A20 Gate Output Signals............................................................................... 576
Scope of LPC Interface Pin Shutdown ................................................................. 578
Scope of Initialization in Each LPC Interface Mode ............................................ 579
Pin Configuration.................................................................................................. 590
D/A Channel Enable ............................................................................................. 592
Pin Configuration.................................................................................................. 597
Analog Input Channels and Corresponding ADDR Registers .............................. 598
A/D Conversion Time (Single Mode)................................................................... 603
A/D Converter Interrupt Source............................................................................ 604
Comparison of Programming Modes.................................................................... 614
Pin Configuration.................................................................................................. 620
Register/Parameter and Target Mode ................................................................... 621
Parameters and Target Modes............................................................................... 629
Setting On-Board Programming Mode ................................................................. 638
System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI......... 640
Executable MAT................................................................................................... 656
Hardware Protection ............................................................................................. 665
Pin Configuration.................................................................................................. 699
JTAG Register Serial Transfer.............................................................................. 700
Correspondence between Pins and Boundary Scan Register ................................ 704
Damping Resistance Values ................................................................................. 722
Crystal Resonator Parameters ............................................................................... 723
PFSEL and Multipliers ......................................................................................... 724
Serial Interrupt Transfer Cycle Frame Configuration ....................................... 582
Receive Complete Interrupts and Error Interrupt.............................................. 584
HIRQ Setting and Clearing Conditions............................................................. 585
Host Addresses Example .................................................................................. 588
Software Protection........................................................................................... 666
Inquiry and Selection Commands ..................................................................... 674
Programming/Erasing Command...................................................................... 685
Status Code ....................................................................................................... 694
Error Code ........................................................................................................ 694
Useable Area for Programming in User Program Mode............................... 657
Useable Area for Erasure in User Program Mode......................................... 659
Useable Area for Programming in User Boot Mode..................................... 661
Useable Area for Erasure in User Boot Mode............................................... 663
Rev. 3.00, 03/04, page xxxix of xl

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