DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 595

MCU 16BIT FLASH 3V 512K 144-TQFP

DF2166VT33WV

Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VT33WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note:
Bit
2
1
0
Bit Name Initial Value Slave Host Description
HWRI
HBTWI
HBTRI
*
Only 0 can be written to clear the flag.
0
0
0
R/(W)* 
R/(W)* 
R/(W)* 
R/W
BT Host Write Interrupt
This status flag indicates that the host writes 1byte
to BTDTR buffer. When the IBFIE3 bit and HWRIE
bit are set to 1, IBFI3 interrupt is requested to the
slave.
0: Host BTDTR write wait state
[Clearing condition]
After the slave reads HWRI = 1, writes 0 to this bit.
1: The host writes to BTDTR
[Setting condition]
The host writes one byte to BTDTR.
BTDTR Host Write Start Interrupt
This status flag indicates that the host writes the first
byte of valid data to BTDTR buffer. When the IBFIE3
bit and HBTWIE bit are set to 1, IBFI3 interrupt is
requested to the slave.
0: BTDTR host write start wait state
[Clearing condition]
After the slave reads HBTWI = 1 and writes 0 to this
bit.
1: BTDTR host write start
[Setting condition]
The host starts writing valid data to BTDTR.
BTDTR Host Read End Interrupt
This status flag indicates that the host reads all valid
data from BTDTR buffer. When the BFIE3 bit and
HBTRIE bit are set to 1, IBFI3 interrupt is requested
to the slave.
0: BTDTR host read end wait state
[Clearing condition]
After the slave reads HBTRI = 1 and writes 0 to this
bit.
1: BTDTR host read end
[Setting condition]
When the host finished reading the valid data from
BTDTR.
Rev. 3.00, 03/04, page 553 of 830

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