DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 375

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.9.4
If compare-matches A and B occur at the same time, the 8-bit timer operates in accordance with
the priorities for the output states set for compare-match A and compare-match B, as shown in
table 12.6.
Table 12.6 Timer Output Priorities
12.9.5
TCNT may increment erroneously when the internal clock is switched over. Table 12.7 shows the
relationship between the timing at which the internal clock is switched (by writing to the CKS1
and CKS0 bits) and the TCNT operation.
When the TCNT clock is generated from an internal clock, the falling edge of the internal clock
pulse is detected. If clock switching causes a change from high to low level, as shown in no. 3 in
table 12.7, a TCNT clock pulse is generated on the assumption that the switchover is a falling
edge, and TCNT is incremented.
Erroneous incrementation can also happen when switching between internal and external clocks.
Table 12.7 Switching of Internal Clocks and TCNT Operation
Output Setting
Toggle output
1 output
0 output
No change
No.
1
Timing of Switchover
by Means of CKS1
and CKS0 Bits
Clock switching from low
to low level*
Conflict between Compare-Matches A and B
Switching of Internal Clocks and TCNT Operation
1
TCNT Clock Operation
Clock before
switchover
Clock after
switchover
TCNT
clock
TCNT
Priority
High
Low
N
CKS bit rewrite
Rev. 3.00, 03/04, page 333 of 830
N + 1