DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 696

MCU 16BIT FLASH 3V 512K 144-TQFP

DF2166VT33WV

Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VT33WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Except for MAT switching, the programming procedure is the same as that in user program mode.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user
MAT, and external space) is shown in section 20.4.4, Procedure Program and Storable Area for
Programming Data.
(3)
For erasing the user MAT in user boot mode, additional processing made by setting FMATS are
required: switching from user-boot-MAT selection state to user-MAT selection state, and
switching back to user-boot-MAT selection state after erasing completes.
Figure 20.15 shows the procedure for erasing the user MAT in user boot mode.
Rev. 3.00, 03/04, page 654 of 830
User MAT Erasing in User Boot Mode
JSR FTDAR setting + 32
Select on-chip program
Figure 20.15 Procedure for Erasing User MAT in User Boot Mode
to be downloaded and
destination by FTDAR
and bus master operation
specify download
Set SCO to 1 and
execute download
Set FKEY to H'A5
Clear FKEY to 0
procedure program
Set the FPEFEQ
Initialization
Disable interrupts
other than CPU
Start erasing
DPFR = 0 ?
parameters
FPFR = 0 ?
1
Yes
Yes
Initialization error processing
Download error processing
No
No
User-boot-MAT
selection state
Note: The MAT must be switched by FMATS to perform
the erasing error processing in the user boot MAT.
No
JSR FTDAR setting + 16
Set FMATS to H'AA to
than H'AA to select user MAT
Set FEBS parameter
select user boot MAT
Set FMATS to value other
Clear FKEY to 0
Set FKEY to H'A5
procedure program
Programming
block erasing is
completed?
End erasing
FPFR = 0 ?
Required
1
Yes
Yes
Clear FKEY and erasing
No
error processing
switchover
switchover
MAT
MAT

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