DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 685

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1)
Parts of the procedure program that are made by the user, like download request,
programming/erasing procedure, and determination of the result, must be executed in the on-chip
RAM. The on-chip program that is to be downloaded is all in the on-chip RAM. Note that area in
the on-chip RAM must be controlled so that these parts do not overlap.
Figure 20.10 shows the program area to be downloaded.
On-chip RAM Address Map when Programming/Erasing is Executed
programming/erasing
processing period
Unusable area in
(Size : 2 kbytes)
downloaded
Area to be
Note: * The on-chip RAM area in this LSI is split into H'FF0800 to H'FF97FF,
Figure 20.10 RAM Map When Programming/Erasing is Executed
H'FFE080 to H'FFEFFF, and H'FFFF00 to H'FFFF7F.
The area that can be used by the user is specified by FTDAR.
Initialization + programming program
Programming/erasing program entry
Area that can be used by user*
Area that can be used by user*
Initialization + erasing program
Initialization program entry
(Return value: 1 byte)
< On-chip RAM >
System use area
(15 bytes)
DPFR
or
Rev. 3.00, 03/04, page 643 of 830
Address
RAMTOP
FTDAR setting
FTDAR setting + 16
FTDAR setting + 32
FTDAR setting + 2 kbytes
RAMEND