DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 520

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.4.5
In I
data, and the slave device returns an acknowledge signal.
The slave device operates as the device specified by the master device when the slave address in
the first frame following the start condition that is issued by the master device matches its own
address.
Rev. 3.00, 03/04, page 478 of 830
(master output)
(master output)
(slave output)
User processing
SCL
SDA
2
SDA
ICDR
IRTR
IRIC
C bus format slave receive mode, the master device outputs the transmit clock and transmit
Figure 15.16 Stop Condition Issuance Timing Example in Master Receive Mode
Data 2
Slave Receive Operation
Bit 0
8
[3]
[4] IRTR=0
Data 1
[6] IRIC clear
(to end wait
insertion)
A
[4] IRTR=1
[7] Set ACKB=1
9
[8] Wait for one clock pulse
[3]
Bit 7
[9] Set TRS=1
1
[10] ICDR read (Data 2)
(MLS = ACKB = 0, WAIT = 1)
Bit 6
2
Bit 5
3
Data 3
[11] IRIC clear
Data 2
Bit 4
4
Bit 3
5
Bit 2
6
Bit 1
7
Bit 0
8
[13] IRTR=0
[12]
[14] IRIC clear
(to end wait
insertion)
A
[15] WAIT cleared to 0,
[12]
[13] IRTR=1
9
IRIC clear
Data 3
[16] ICDR read
Stop condition generation
(Data 3)
[17] Stop condition issuance